Finite State Machine based VHDL Implementation of a Median Filter

FPGA Implementation of a Median Filter

The median filter is an effective device for the removal of impulse-based noise on video signals. This is due to the partial averaging effect of the median filter and its biasing of the input stream, rather than straight mathematical averaging. In this paper, we describe three realizations of median filter, built into as few as one Field programmable logic device, which is capable of processing...

Design of VHDL-based totally self-checking finite-state machine and data-path descriptions

This paper presents a complete methodology to design a Totally Self-Checking sequential architecture based on the generic architecture of FSMD (finite state machine and data path), such as the one deriving from VHDL specifications. The control part of the system is designed to be Self-Checking by adopting a state assignment providing a constant Hamming distance between each 〈present state, next...

An Effective Attack-Resilient Kalman Filter-Based Approach for Dynamic State Estimation of Synchronous Machine

Kalman filtering has been widely considered for dynamic state estimation in smart grids. Despite its unique merits, the Kalman Filter (KF)-based dynamic state estimation can be undesirably influenced by cyber adversarial attacks that can potentially be launched against the communication links in the Cyber-Physical System (CPS). To enhance the security of KF-based state estimation, in this paper...

Hardware Implementation of Real Time Window Based Switching Median Filter

Processing of a digital image by the use of computer algorithm is usually referred as digital image processing. However, some unwanted signals capture the image which is termed as noise. Thus the digital image filtering technique is frequently used to eliminate noise. Generally image filters are following up software approach in systems. But hardware implementation prefers in comparison with so...

Finite State Machine Based SDL